16.3 Virtual Address Translation
Format of a TLB Entry
Figure 16-5 shows the TLB entry formats for both 32- and 64-bit modes. Each field of an entry has a corresponding field in the EntryHi, EntryLo0, EntryLo1, or PageMask registers, as shown in Chapter 14, Coprocessor 0; for example the PFN and uncached attribute (UC) fields of the TLB entry are also held in the EntryLo registers.
Figure 16-5 Format of a TLB Entry
Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96
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